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Full-Time
AMS VERIFICATION ENGINEER
Location: Bangalore (BLR)
Experience: 4–6 Years
Openings: 2
Salary: Competitive Package
⚡ Mandatory Technical Skills:
Candidates must have strong hands-on experience in: AMS Verification, Verilog-AMS, SystemVerilog, wreal Modeling, and Xcelium AMS / VCS AMS.
Role Overview
We are seeking an experienced AMS Verification Engineer to own mixed-signal verification for assigned IPs and subsystems from specification review through sign-off. Candidates will develop and maintain wreal models for analog blocks to enable fast, scalable verification while collaborating closely with analog and digital design teams.
Key Responsibilities
- Own AMS verification for assigned IPs/subsystems from specification review through sign-off
- Develop and maintain wreal models for analog blocks to enable fast and scalable verification
- Work closely with analog designers to understand circuit intent and abstraction trade-offs
- Analyze failures across digital and analog domains and drive root-cause resolution
- Review and improve existing AMS testbenches and models
- Contribute to coverage closure, waiver reviews, and sign-off documentation
- Ensure verification quality and documentation across mixed-signal IPs
Qualifications & Requirements
- 4–6 years of hands-on experience in AMS Verification
- Strong hands-on expertise in Verilog-AMS and SystemVerilog
- Proven experience in wreal Modeling for analog blocks
- Hands-on proficiency with industry-standard tools (Xcelium AMS / VCS AMS)
- Strong debug skills across cross-functional mixed-signal domains
- B.E. / B.Tech / M.E. / M.Tech in Electrical / Electronics / VLSI Design or related field