AUTOMATION ENGINEER (ASIC DV / EDA AUTOMATION)

About the Role

You will eliminate operational bottlenecks across ASIC and SoC design verification flows. You will architect, develop, and deploy software automation tools that accelerate chip design pipelines. You will evaluate commercial EDA software, integrate modern AI/ML acceleration techniques, and standardize design methodologies across multi-site engineering teams.

Key Responsibilities

• Partner with chip project leads to define, influence, and standardize tool methodologies across design, verification, and emulation.
• Architect and implement robust software automation tools that resolve throughput bottlenecks in the EDA toolchain.
• Perform technical evaluations of commercial EDA tools, assess AI/ML capabilities, and execute deployment roadmaps.
• Drive internal software initiatives, enforce structured code reviews, and participate in technical trade-off decisions.
• Prototype and deploy custom workflows directly with front-end hardware engineering teams to maximize productivity.

Required Qualifications & Skills

• Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or equivalent practical experience.
• 6 to 9 years of direct experience in ASIC chip design verification environments.
• 6 to 9 years of hands-on experience utilizing and extending EDA software tool suites.
• High proficiency in Python and C++ programming with adherence to modern software design patterns.
• Thorough operational understanding of the ASIC development lifecycle (verification, front-end design, implementation).
• Proven track record deploying AI/ML solutions to optimize verification coverage or EDA runtime.
• Experience deploying enterprise CI/CD and regression farm management flows.
• Strong technical communication skills with the ability to train and support engineering teams on new tools.