Design Verification Engineer (Digital)

Job Summary

This role involves Functional and Performance verification using effective methodologies at Module/Subsystem/SoC/System level. A strong ability to map requirements into a traceable verification plan is essential. The ideal candidate will partner with local and global SoC and IP developers to drive best practices and continuous productivity improvement, with a "zero-defect" mindset.

Key Responsibilities

• Verification planning and mapping requirements into a traceable verification plan
• Verification testbench development and implementation
• Development of testbench components such as drivers, monitors, and response checkers, using advanced UVM VIPs
• Development of direct and constrained-random stimulus
• Analysis of RTL code, functional coverage, and assertion coverage results
• Development of functional coverage and SystemVerilog assertions
• Implementation of formal verification methods
• Strong debugging, failure recreation, and root cause analysis

Job Qualifications

• B.Tech/M.Tech with 8–12 years' experience in SoC/IP/Subsystem verification of multimillion-gate complex designs with multiple clocks/power domains
• Strong hands-on experience with C and UVM/SV-based test environments
• Proficiency in HDLs (Verilog/VHDL) and simulators (Synopsys/Cadence/Mentor) — required
• Strong understanding of design/architecture with ability to debug RTL/gate netlists — required
• Coverage-driven verification for functional and performance requirements, plus regression management
• Knowledge of microcontroller architecture, ARM cores, interconnects (NIC, FlexNoC), and cache coherency
• Experience with bus protocols: AHB/AMBA, AXI, ACE

Additional Value Skills

• Memory controllers (Flash, SRAM, DDR3/4, LPDDR)
• Protocols such as PCIe, MIPI, GPU, VPU, Ethernet, USB, and Image processing
• Formal verification methodologies and apps, AVIP, PinMuxing verification, randomization
• Low-power intent verification using CPF, UPF
• Exposure to pre-silicon validation/emulation (Palladium, Zebu) or FPGA prototyping