MEMORY DESIGN ENGINEER (M31)

Role Overview

We are looking for a Memory Design Engineer to own memory compiler and characterization setups end to end, from PVT characterization runs through data validation and hand-over of the final database.

Key Responsibilities

• Create and validate memory compiler setups
• Build and validate characterization setups across the design
• Run full PVT (process-voltage-temperature) characterization sweeps
• Validate characterization data and generated views for accuracy
• Perform database sanity checks and hand over deliverables to the packaging team
• Generate and validate .lib, AVM, or .dat views
• Support Monte Carlo simulations, aging analysis, and Liberty Variation Format (LVF) modeling

Requirements & Qualifications

• 4-5 years of experience in memory design and characterization
• Deep understanding of SRAM cells, sense amplifiers, decoders, and peripheral circuitry
• Proficiency in SPICE simulators (HSPICE, Spectre, FineSim) for timing, power, noise, and leakage simulations
• Hands-on experience generating and validating Liberty/.lib views
• Knowledge of Monte Carlo simulation, aging, and LVF
• Strong scripting skills in Python, Perl, or TCL for characterization flow automation